mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 321

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

1
2
3
4
5
6
7
8
9
10
Freescale Semiconductor
INITRQ
The MSCAN must be in normal mode for this bit to become set.
See the Bosch CAN 2.0A/B specification for a detailed definition of transmitter and receiver states.
In order to protect from accidentally violating the CAN protocol, the TXCAN pin is immediately forced to a recessive state when
the CPU enters wait (CSWAI = 1) or stop mode (see
“Operation in Stop
The CPU has to make sure that the WUPE bit and the WUPIE wake-up interrupt enable bit (see
Receiver Interrupt Enable Register
The CPU cannot clear SLPRQ before the MSCAN has entered sleep mode (SLPRQ = 1 and SLPAK = 1).
The CPU cannot clear INITRQ before the MSCAN has entered initialization mode (INITRQ = 1 and INITAK = 1).
In order to protect from accidentally violating the CAN protocol, the TXCAN pin is immediately forced to a recessive state when
the initialization mode is requested by the CPU. Thus, the recommended procedure is to bring the MSCAN into sleep mode
(SLPRQ = 1 and SLPAK = 1) before requesting initialization mode.
Not including WUPE, INITRQ, and SLPRQ.
TSTAT1 and TSTAT0 are not affected by initialization mode.
RSTAT1 and RSTAT0 are not affected by initialization mode.
SLPRQ
WUPE
Field
2
1
0
6,7
4
5
Wake-Up Enable — This configuration bit allows the MSCAN to restart from sleep mode when traffic on CAN is
detected (see
the selected function to take effect.
0 Wake-up disabled — The MSCAN ignores traffic on CAN
1 Wake-up enabled — The MSCAN is able to restart
Sleep Mode Request — This bit requests the MSCAN to enter sleep mode, which is an internal power saving
mode (see
idle, i.e., the module is not receiving a message and all transmit buffers are empty. The module indicates entry
to sleep mode by setting SLPAK = 1 (see
cannot be set while the WUPIF flag is set (see
Sleep mode will be active until SLPRQ is cleared by the CPU or, depending on the setting of WUPE, the MSCAN
detects activity on the CAN bus and clears SLPRQ itself.
0 Running — The MSCAN functions normally
1 Sleep mode request — The MSCAN enters sleep mode when CAN bus idle
Initialization Mode Request — When this bit is set by the CPU, the MSCAN skips to initialization mode (see
Section 15.5.5.5, “MSCAN Initialization
synchronization to the CAN bus is lost. The module indicates entry to initialization mode by setting INITAK = 1
(Section 15.3.2, “MSCAN Control Register 1
The following registers enter their hard reset state and restore their default values: CANCTL0
CANRIER
The registers CANCTL1, CANBTR0, CANBTR1, CANIDAC, CANIDAR0-7, and CANIDMR0-7 can only be written
by the CPU when the MSCAN is in initialization mode (INITRQ = 1 and INITAK = 1). The values of the error
counters are not affected by initialization mode.
When this bit is cleared by the CPU, the MSCAN restarts and then tries to synchronize to the CAN bus. If the
MSCAN is not in bus-off state, it synchronizes after 11 consecutive recessive bits on the CAN bus; if the MSCAN
is in bus-off state, it continues to wait for 128 occurrences of 11 consecutive recessive bits.
Writing to other bits in CANCTL0, CANRFLG, CANRIER, CANTFLG, or CANTIER must be done only after
initialization mode is exited, which is INITRQ = 0 and INITAK = 0.
0 Normal operation
1 MSCAN in initialization mode
Mode”)
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
10
Section 15.5.5.4, “MSCAN Sleep
Table 15-1. CANCTL0 Register Field Descriptions (continued)
, CANTFLG, CANTIER, CANTARQ, CANTAAK, and CANTBSEL.
.
Section 15.5.5.4, “MSCAN Sleep
(CANRIER)) is enabled, if the recovery mechanism from stop or wait is required.
Mode”). Any ongoing transmission or reception is aborted and
Section 15.5.5.2, “Operation in Wait
Section 15.3.2, “MSCAN Control Register 1
Mode”). The sleep mode request is serviced when the CAN bus is
(CANCTL1)”).
Section 15.3.4.1, “MSCAN Receiver Flag Register
Mode”). This bit must be configured before sleep mode entry for
Description
Freescale’s Controller Area Network (MSCANV1)
Mode” and
Section 15.3.5, “MSCAN
(CANCTL1)”). SLPRQ
Section 15.5.5.3,
8
, CANRFLG
(CANRFLG)”).
9
,
15-5