mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 404

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

Rapid GPIO (RGPIO)
17.3.3
The RGPIO_ENB register configures the corresponding package pin as a RGPIO pin instead of the normal
GPIO pin mapped onto the peripheral bus.
The RGPIO_ENB register is read/write. At reset, all bits in the RGPIO_ENB are cleared, disabling the
RGPIO functionality.
17.3.4
The RGPIO_CLR register provides a mechanism to clear specific bits in the RGPIO_DATA by performing
a simple write. Clearing a bit in RGPIO_CLR clears the corresponding bit in the RGPIO_DATA register.
Setting it has no effect. The RGPIO_CLR register is write-only; reads of this address return the
RGPIO_DATA register.
17-6
Field
DATA
Offset: RGPIO_Base + 0x4 (RGPIO_ENB)
Field
Offset: RGPIO_Base + 0x6 (RGPIO_CLR)
15–0
15–0
ENB
Reset
Reset
W
W
R
R
RGPIO data.
0 A properly-enabled RGPIO output pin is driven with a logic 0, or a properly-enabled RGPIO input pin was read as
1 A properly-enabled RGPIO output pin is driven with a logic 1, or a properly-enabled RGPIO input pin was read as
RGPIO enable.
0 The corresponding package pin is configured for use as a normal GPIO pin, not a RGPIO
1 The corresponding package pin is configured for use as a RGPIO pin
—
15
15
0
a logic 0
a logic 1
RGPIO Pin Enable (RGPIO_ENB)
RGPIO Clear Data (RGPIO_CLR)
—
14
14
0
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
—
13
13
0
Figure 17-5. RGPIO Clear Data Register (RGPIO_CLR)
Figure 17-4. RGPIO Enable Register (RGPIO_ENB)
—
12
12
0
Table 17-6. RGPIO_DATA Field Descriptions
Table 17-7. RGPIO_ENB Field Descriptions
11
11
—
0
—
10
10
0
—
0
9
9
Description
Description
—
8
0
8
ENB
CLR
—
0
7
7
—
0
6
6
—
0
5
5
—
0
4
4
—
3
0
3
Freescale Semiconductor
Access: Read/write
—
Access: Write-only
0
2
2
—
0
1
1
—
0
0
0