mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 474

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

Timer/PWM Module (TPMV3)
21.1.2
The TPM includes these distinctive features:
21.1.3
In general, TPM channels are independently configured to operate in input capture, output compare, or
edge-aligned PWM modes. A control bit allows the whole TPM (all channels) to switch to center-aligned
PWM mode. When center-aligned PWM mode is selected, input capture, output compare, and
edge-aligned PWM functions are not available on any channels of this TPM module.
When the MCU is in active BDM background or BDM foreground mode, the TPM temporarily suspends
all counting until the MCU returns to normal user operating mode. During stop mode, all TPM input clocks
are stopped, so the TPM is effectively disabled until clocks resume. During wait mode, the TPM continues
to operate normally. If the TPM does not need to produce a real time reference or provide the interrupt
sources needed to wake the MCU from wait mode, the power can then be saved by disabling TPM
functions before entering wait mode.
21-2
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One to eight channels:
— Each channel is input capture, output compare, or edge-aligned PWM
— Rising-edge, falling-edge, or any-edge input capture trigger
— Set, clear, or toggle output compare action
— Selectable polarity on PWM outputs
Module is configured for buffered, center-aligned pulse-width-modulation (CPWM) on all
channels
Timer clock source selectable as bus clock, fixed frequency clock, or an external clock
— Prescale taps for divide-by 1, 2, 4, 8, 16, 32, 64, or 128 used for any clock input selection
— Fixed frequency clock is an additional clock input to allow the selection of an on chip clock
— Selecting external clock connects TPM clock to a chip level input pin therefore allowing to
16-bit free-running or modulus count with up/down selection
One interrupt per channel and one interrupt for TPM counter overflow
Input capture mode
When a selected edge event occurs on the associated MCU pin, the current value of the 16-bit timer
counter is captured into the channel value register and an interrupt flag bit is set. Rising edges,
falling edges, any edge, or no edge (disable channel) are selected as the active edge that triggers
the input capture.
Output compare mode
When the value in the timer counter register matches the channel value register, an interrupt flag
bit is set, and a selected output action is forced on the associated MCU pin. The output compare
action is selected to force the pin to zero, force the pin to one, toggle the pin, or ignore the pin (used
for software timing functions).
Edge-aligned PWM mode
source other than bus clock
synchronize the TPM counter with an off chip clock source
Features
Modes of Operation
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor