mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 372

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

Multipurpose Clock Generator (MCGV3)
16.1.2
There are several modes of operation for the MCG. For details, see
Operation.”
16.2
There are no MCG signals that connect off chip.
16.3
16.3.1
16-4
IREFSTEN
IRCLKEN
IREFS
CLKS
Field
RDIV
7:6
5:3
2
1
0
Reset:
External Signal Description
Register Definition
W
R
Modes of Operation
MCG Control Register 1 (MCGC1)
Clock Source Select — Selects the system clock source.
00
01
10
11
External Reference Divider — Selects the amount to divide down the external reference clock. If the FLL is
selected, the resulting frequency must be in the range 31.25 kHz to 39.0625 kHz. If the PLL is selected, the
resulting frequency must be in the range 1 MHz to 2 MHz. See
Internal Reference Select — Selects the reference clock source.
1 Internal reference clock selected
0 External reference clock selected
Internal Reference Clock Enable — Enables the internal reference clock for use as MCGIRCLK.
1 MCGIRCLK active
0 MCGIRCLK inactive
Internal Reference Stop Enable — Controls whether or not the internal reference clock remains enabled when
the MCG enters stop mode.
1 Internal reference clock stays enabled in stop if IRCLKEN is set or if MCG is in FEI, FBI, or BLPI mode before
0 Internal reference clock is disabled in stop
entering stop
Encoding 0 — Output of FLL or PLL is selected.
Encoding 1 — Internal reference clock is selected.
Encoding 2 — External reference clock is selected.
Encoding 3 — Reserved, defaults to 00.
7
0
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
CLKS
Table 16-1. MCG Control Register 1 Field Descriptions
Figure 16-2. MCG Control Register 1 (MCGC1)
0
6
0
5
RDIV
0
4
Description
0
Table 16-2
3
Section 16.4.1, “MCG Modes of
and
IREFS
1
2
Table 16-3
IRCLKEN
Freescale Semiconductor
for the divide-by factors.
0
1
IREFSTEN
0
0