pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 105

• Manufacturer Part Number: pef20320
• Description: Multichannel Network Interface Controller For Hdlc With 32 Channels
• Manufacturer: Infineon Technologies Corporation

Example 1:
(no subchanneling by fill/mask bits)
TMA channel with
Figure 58
Note: 1. Data are formatted according to §2.8 of Q.921. The TC is transmitted MSB
User’s Manual
31
For INV=1 DATA and TC would be Inverted
20020000
Time-Slot
Boundaries
Bit No
1
TFLAG = B2
INV = 0
CRC = 0
TRV = 00
FA = 1
MODE = 00
IFTF = 0
All fill-mask bits are ‘1’ for this channel (no high impedance overwrite)
Intel interface
Channel no. D
2. FNUM = 0 in the second descriptor leads to the insertion of the TC after
st
Desc
DATA
(bit 15) first though!!!
DATA 2, FNUM = 1 in the third descriptor to the insertion of 2 TCs.
0
0
1
.....
31
XX XX D1 AB
Generate HI-Interrupt
8800200D
0
D
DATA
H
5
7 0
(required)
(required)
(flag filtering)
(TMA)
(required)
(no data inversion)
8
1
B
7 0
31
0
1
A0030000
2
6 C
nd
7 0
Desc
DATA 2
DATA 2
4 8
0
0
7 0
0 0
31
XX
7 0
Generate HI-, FI-Interrupt
8800300D
TC
00
B 2
2
7 0
12
DATA 3
4 F
36
105
31
0
7 0
80010001
3
B 2
rd
Desc
2 TCs
7 0
DATA 3
B 2
0
0
7
0
8 B
31
XX XX XX F2
7
DATA
0
B
4
7 0 7 0
4
4 C
31
0
Functional Description
00030000
4 Desc
th
.....
DATA 4
0
0
31
XX
PEB 20320
32
ITD04564
2D
01.2000
D1
0