pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 12
pef20320
Manufacturer Part Number
pef20320
Description
Multichannel Network Interface Controller For Hdlc With 32 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF20320.pdf
(252 pages)
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User’s Manual
1.3
Pin Definitions and Functions
Pin No.
P-MQFP-160-1
83, 87, 88, 92,
97, 103, 104,
110, 111, 117,
123, 130, 136,
141, 144, 150,
151, 157, 3, 9,
10, 16, 22, 23,
29, 30, 36, 59,
62, 64, 77
73
39
35
Note: Input pins that are unused in a specific configuration must be strapped to
I/O or output pins that are unused in a specific configuration must be left open!
Pin Definitions and Functions
Symbol
V
I/M
A31
DP3
A30
DP2
SS
Output (O)
Input (I)
I/O
I/O
O
O
I
I
12
Function
Ground (0 V)
All pins must have the same level.
Intel Bus Mode or Motorola Bus Mode
By connecting this pin to either
the bus interface can be adapted to either
Intel or Motorola environment. The data is
interpreted either in Intel or Motorola
manner; i.e. little or big endian convention.
I/M = low: Intel bus mode
I/M = high: Motorola bus mode
Address Bit 31
(Intel non-parity/Motorola) tristate when
unused.
Data Parity 3 (Intel parity mode),
bidirectional tristate line containing/
expecting parity bit of D(31:24).
Address Bit 30
(Intel non-parity/Motorola) tristate when
unused.
Data Parity 2 (Intel parity mode),
bidirectional tristate line containing/
expecting parity bit of D(23:16).
Introduction
PEB 20320
V
SS
01.2000
or
V
SS
V
.
DD
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