pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 40

• Manufacturer Part Number: pef20320
• Description: Multichannel Network Interface Controller For Hdlc With 32 Channels
• Manufacturer: Infineon Technologies Corporation

PEB 20320
Functional Description
If the HOLD ACKNOWLEDGE is driven low while the MUNICH32 is performing a bus
cycle, the bus is released later than two clock periods after de-assertion of HOLD
ACKNOWLEDGE. The current bus cycle is finished with a bus cycle error. This action
should be followed by an ASP.RES as described in Chapter 4.2.1.
READ
READ
BERR
S1
S2
S1
S2
S
S
S1
S2
W
W
SCLK
A31-A2
BE(3:0)
[A27-A2]
W/R
Tristate
ADS
READY
BERR
[DP3-DP0], D(31:0)
[PCHK]
ITD03501
Figure 18
Read Cycle Timing Diagram (Intel mode)
User’s Manual
40
01.2000