pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 201
pef20320
Manufacturer Part Number
pef20320
Description
Multichannel Network Interface Controller For Hdlc With 32 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF20320.pdf
(252 pages)
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PEB 20320
Application Notes
5.2.5
Final Remarks
This application note shows a design example for the MUNICH32 (PEB 20320). Though
the design example is of reduced complexity it gives an idea of how to use the
MUNICH32 in a system. The MUNICH32 is integrated in a 68040 processor system in
conjunction with one more alternate bus master.
To achieve higher data rates the time to process the frames should be minimized. This
includes minimization of bus idle time. The bus arbitration still has big improvement
potential because of its modular structure. Additionally the existence of the alternate bus
masters results in clocking the bus controller with two different frequencies. This also
results in increased idle time for the bus should therefore be modified. Furthermore
frame processing could be shortened by eliminating the wait states in every bus cycle.
The influence of MUNICH32 poll accesses is extremely high in this example, because of
the bus arbitration architecture and the system architecture with one bus controller for all
bus masters. But anyway it should always kept in mind, that the bus occupancy during
polling is higher than during transmission. During transmission it decreases rapidly.
No upper layer software is realized in this example so far. For ‘real life’ routing layer 2
and 3 software module(s) have to be integrated.
User’s Manual
201
01.2000
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