pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 164

• Manufacturer Part Number: pef20320
• Description: Multichannel Network Interface Controller For Hdlc With 32 Channels
• Manufacturer: Infineon Technologies Corporation

User’s Manual
Intel Mode
Motorola Mode
CSM:
FNUM:
E7
31
31
SA
15
15
0
0
E6
30
30
14
0
14
X
0
CRC Select per Message: This bit is only valid in HDLC mode with CS = 0 and
only in conjunction with the FE bit set. If set, it means that no FCS is
generated automatically for the frame finished in this transmit descriptor.
FNUM denotes the number of interframe time-fill characters between
2 HDLC or TMB frames. For X.30/V.110 these bits have to be set to ‘0’.
FNUM = 0 means that after the current frame only 1 character (7E
and 00
TMA, FA = 0) is sent before the following frame (shared flags).
FNUM = 1 means that after the current frame 2 characters (7E
and 00
TMA, FA = 0) are sent before the following frame (non shared flags).
FNUM = 2 means that after the current frame 3 characters (7E
(IFTF = 0) or 7E
TMR, TFLAG, TFLAG, TFLAG for TMA, FA = 1; FF FF FF
are sent.
E5
29
29
13
13
0
0
0
H
E4
H
28
28
12
12
0
0
0
00
for TMB, 000
H
E3
11
11
27
27
0
0
0
for TMB and TMR, TFLAG, TFLAG for TMA, FA = 1; FF FF
H
10
10
FF
E2
26
0
26
0
0
H
7E
H
9
0
9
0
E1
25
25
0
for TMR, TFLAG, TFLAG for TMA, FA = 1; FF
H
(IFTF = 1) for HDLC and 00
8
0
8
0
SB
24
24
0
164
E7
SA
23
23
7
0
7
0
E6
22
22
X
6
0
0
6
Detailed Register Description
E5
21
21
0
5
0
0
5
E4
20
20
0
4
0
0
4
H
00
E3
19
19
0
3
0
0
3
H
H
for TMA, FA = 0)
00
H
E2
18
18
0
2
0
0
2
H
7E
PEB 20320
for TMB and
H
H
H
E1
17
17
for HDLC
for HDLC
7E
0
1
0
0
1
01.2000
H
H
H
SB
7E
16
16
0
0
0
0
0
for
for
H