pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 78

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pef20320

Manufacturer Part Number
pef20320
Description
Multichannel Network Interface Controller For Hdlc With 32 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet

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User’s Manual
Interrupts
The possible interrupts for the mode in transmit direction are:
HI:
FI:
ERR: one of the following transmit errors has occurred:
FO:
typical data stream has the form
Example:
HDLC channel with
CS = 0)
INV = 0
CRC = 0
TRV = 00
FA = 1
MODE = 11
IFTF = 1
INTEL interface
Channel number 1A
… ITF
issued if the HI bit is detected in the transmit descriptor (not maskable)
issued if the FE bit is detected in the transmit descriptor
(maskable by FIT in the channel specification)
– the last descriptor had H = 1 and FE = 0
– the last descriptor had NO = 0 and FE = 0
one of the following transmit errors have occurred
– a BERR = ‘0’ was detected during a read access to a transmit data section for
– the MUNICH32 was unable to access the shared memory in time either for new
(maskable by TE in the channel specification)
this channel
data to be sent or for a new transmit descriptor.
(maskable by TE in the channel specification)
FLAG
(FCS generated automatically)
(no inversion)
(CRC16)
(required as unused in HDLC mode)
(flag adjustment)
(HDLC)
(interframe time-fill ‘1’s)
DATA
78
FCS
FLAG
Functional Description
ITF
PEB 20320
01.2000

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