pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 178

• Manufacturer Part Number: pef20320
• Description: Multichannel Network Interface Controller For Hdlc With 32 Channels
• Manufacturer: Infineon Technologies Corporation

User’s Manual
5.1.4
5.1.4.1 Internal Channelwise Test Loop
Generate HW RESET, and hold off RSP/TSP for 1000 SCLK cycles.
ASP:
IQS:
TSA[0]:
TSA[1…31]:
CSP[0]:
CSP[1…31]
CRA[0…31]
CTA[0…31]
ICQ:
FRDA:
FTDA:
Test Loop Examples
A104-8004
ICQ
0000-001F
00FF-00FF
0000-0000 ( 31)
00E9-0006
FRDA
FTDA
0000-0002
0000-0000
0000-0000 ( 32)
0000-0000 ( 32)
0000-0000 ( 512)
0020-0000
0000-0000
RcvDtaPtr
NxtRDPtr
0020-0000
0000-0000
RcvDtaPtr
NxtRDPtr
0020-0000
0000-0000
RcvDtaPtr
NxtRDPtr
4020-0000
0000-0000
RcvDtaPtr
0000-0000
C000-0000
XmtDtaPtr
NxtTDPtr
0020-0000
XmtDtaPtr
NxtTDPtr
C020-0000
XmtDtaPtr
0000-0000
0000-0000
178
;
;CEPT, MFL=260, IN, IA=1
;TS0 = CH0
;Tx/Rc init, poll Tx Desc, HDLC
;ITBS = 2 long words
32 byte
data block
32 byte
data block
32 byte
data block
;HOLD = 1
32 byte
data block
HOLD, FE = 1 for dummy frame
abcdefghijklmnop
qrstuvwxyz012345
;FE, HOLD = 1
ABCDEFGHIJKLMNOP
QRSTUVWXYZ987654
0000-0000
0000-0000 (x31)
Application Notes
PEB 20320
01.2000