pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 225

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pef20320

Manufacturer Part Number
pef20320
Description
Multichannel Network Interface Controller For Hdlc With 32 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet

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Figure 114
The adaption of the TSP and RSP pulses is solved by means of shifting the receive data
and transmit data in the FALC54 device appropriately. In this case the TSP and RSP
synchronization pulses are also identical. The FALC54 device contains special registers
to control the bit shift of the serial bit streams at the system interface (see FALC54 Data
Sheet). With the following register programming the bit shift selected is T = 509 for the
MUNICH32 transmit data and T = – 1 for the receive data respectively. The
programming is as follows:
XDI: XC1.XTO = 3D
RDO: RC1.RTO = 00
User’s Manual
XC0.XCO = 06
RC0.RCO = 05
MUNICH32
PEB 20320
H
H
H
H
RDATA
TDATA
RCLK
TCLK
=> X = 494
=> X = 5
RSP
TSP
=> T = 509
=> T = – 1
225
SYPXQ
XDI
SCLKX
SCLKR
RDO
SYPRQ
CLKX
CLK8M
FALC54
PEB
2254
FSCQ
FSC
Application Hints
ITS07370
PEB 20320
01.2000

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