pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 16

• Manufacturer Part Number: pef20320
• Description: Multichannel Network Interface Controller For Hdlc With 32 Channels
• Manufacturer: Infineon Technologies Corporation

User’s Manual
Pin Definitions and Functions (cont’d)
Pin No.
P-MQFP-160-1
76
74
Symbol
BERR
B16
Output (O)
Input (I)
I
I
16
Function
Bus Error (Intel and Motorola bus mode)
This active low signal informs the
MUNICH32 that a bus cycle error has
occurred. The MUNICH32 terminates the
bus cycle.
In case of an erroneous read cycle in the
control and configuration section an
‘Action Request Fail’ interrupt is generated
and the action is suspended. In case of an
erroneous read cycle in the transmit data
section the corresponding frame is
aborted and a FO interrupt is generated. In
all other cases of read or write cycles
terminated with an error condition no
further actions are performed by the
MUNICH32. Please see Chapter 2.2,
‘Microprocessor Interface’, first paragraph
and Figure 18.
As bus cycles are executed without time
limit this signal prevents a hang-up
situation of the MUNICH32.
Word Operation
Setting this bit to
MUNICH32 to perform 32-bit long word
accesses to the shared memory, setting it
to
16-bit word accesses on the data lines
D(15:0) only. In 16-bit word access mode
the data lines D(31:16) should be left
open.
This bit is not dynamic and should be set
to
V
V
SS
DD
causes the MUNICH32 to perform
in Intel parity mode.
V
DD
causes the
Introduction
PEB 20320
01.2000