pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 139

• Manufacturer Part Number: pef20320
• Description: Multichannel Network Interface Controller For Hdlc With 32 Channels
• Manufacturer: Infineon Technologies Corporation

Figure 77
Action Specification
User’s Manual
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5
PCM Highway Format
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
PCM
T1/DS1 24 Time-Slots, 1.536 Mbit/s
Not Allowed
Not Allowed
Not Allowed
T1/DS1 24 Time-Slots, 1.544 Mbit/s
CEPT 32 Time-Slots, 2.048 Mbit/s
4.096 Mbit/s PCM Format, even Time-Slots
4.096 Mbit/s PCM Format, odd Time-Slots
Maximum Frame Length
Maximum size of a received frame
in HDLC, TMB and TMR mode (up to 8192 bytes).
A received frame is aborted and an interrupt
is generated if the size of a received frame
exceeds the MFL value.
MFL applies to all channels.
spec. of the specified channel
assignment and the channel
Read the complete time-slot
MFL
Initialization Procedure
Initialize Channel Only
of the selected channel
Only the channel spec.
read and reconfigured.
(channel number).
(channel number) is
139
0
Channel No.
Used in
conjunction
with IN
and ICO
Channel
Number
Detailed Register Description
Interrupt Mask
Do not generate the ARACK & ARF interrupt
Reset
Read the complete time-slot assignment
Read all channel specifications
Reinitialize all time-slots
Loops
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
4 3 2 1 0
No Loop
Complete Internal Loop
Complete Internal Loop
Not Allowed
Not Allowed
Channelwise int. Loop
Channelwise ext. Loop
Not Allowed
Interrupt Attention
A new interrupt queue
has been defined. Read
the interrupt queue
specification.
0 0
PEB 20320
ITS08221
01.2000