pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 136

• Manufacturer Part Number: pef20320
• Description: Multichannel Network Interface Controller For Hdlc With 32 Channels
• Manufacturer: Infineon Technologies Corporation

User’s Manual
4.2
Table 8
Buffer Size of the Control and Configuration Section
Control and Configuration Section
Action specification
Interrupt queue specification
Time slot assignment
Channel specification
Current descriptor address
4.2.1
All actions are selected by setting the corresponding bits to ‘1’.
PCM: These three bits determine the PCM highway format.
MFL: Maximum Frame Length (up to 8191 bytes); MUNICH32 monitors the frame length
31 30 29
15 14 13
IN IC0
PCM
of the incoming HDLC, TMB or TMR frames. If the maximum frame length is
exceeded an interrupt is generated and the current frame aborted. The length
check is active in all modes except transparent mode A and V.110/X.30. Therefore
in all other modes one has to write a reasonable value to MFL after reset. MFL is
the same for all logical channels.
Control and Configuration Section
Action Specification (Read Once After Each Action Request Pulse)
0
000: T1/DS1 24-channel 1.536 Mbit/s
100: T1/DS1 24-channel 1.544 Mbit/s
101: CEPT 32-channel
110: 4.096-Mbit/s PCM format and even numbered time slots
111: 4.096-Mbit/s PCM format and odd numbered time slots
28
12
Channel Number
27 26 25 24
11 10
9
8
23
IM RES LOC LOOP LOOPI IA
7
136
22
6
MFL
Number of Long Words
1
2
32
128
64
21
5
Detailed Register Description
20
4
19
3
18
2
PEB 20320
17
1
0
01.2000
16
0
0