pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 198

• Manufacturer Part Number: pef20320
• Description: Multichannel Network Interface Controller For Hdlc With 32 Channels
• Manufacturer: Infineon Technologies Corporation

PEB 20320
Application Notes
Bus Occupancy
The bus occupancy during normal operation is shown in Figure 96. In this case the data
buffer size was 32 Byte. The CPU has busmastership during 90% of the time. The
MUNICH32 as well as the LAN controller, each have busmastership 5% of the time.
1)
The bus occupancy of the MUNICH32 is calculated to 2.5%
. In this system it is higher
because of inserted wait states in every bus cycle. Another reason is the bus controller’s
clock which is switched from 33 MHz to 40 MHz. This and the existence of two alternate
bus masters results in a more time consuming arbitration protocol than that needed for
a simpler architecture.
i82596
M32
5 %
5 %
CPU
90 %
ITD08294
Figure 96
Bus Occupancy
1)
Compare Data Sheet.
User’s Manual
198
01.2000