pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 24

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pef20320

Manufacturer Part Number
pef20320
Description
Multichannel Network Interface Controller For Hdlc With 32 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet

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User’s Manual
The internal functions of MUNICH32 are partitioned into 8 major blocks.
1. Serial Interface, Formatter Control Unit CD
2. Transmit Formatter TF
3. Transmit Buffer TB
4. Receive Deformatter RD
5. Receive Buffer RB
6. Configuration and State RAM CSR
7. DMA Controller CM
8. P interface MI
– HDLC frame, bit stuffing, flag generation, flag stuffing and adjustment,
– Buffer size of 64 long words allocated to the channels, i.e. eight PCM frames can be
– HDLC frame, zero-bit deletion, flag detection, CRC checking, transparent mode
– Buffer size of 64 long words allocated to the channels, i.e. eight PCM frames can be
– Since the Transmit Formatter, Receive Deformatter are used in a multiplex manner,
– Interrupt processing, memory address calculation, chaining list handling,
– Motorola/Intel microprocessor interface.
– Parallel-Serial conversion, PCM timing, switching of the test loops, controlling of the
multiplex procedure.
CRC generation, transparent mode transmission and V.110, X.30 80 bit framing.
stored before transmission, individual channel capacity programmable.
reception and V.110, X.30 80 bit framing.
stored, individual long words are freely accessible by each channel.
the state and configuration information of each channel has to be stored.
chip configuration.
24
Introduction
PEB 20320
01.2000

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