pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 251

no-image

pef20320

Manufacturer Part Number
pef20320
Description
Multichannel Network Interface Controller For Hdlc With 32 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
pef20320HV3.4
Manufacturer:
MAXIM
Quantity:
845
Part Number:
pef20320HV3.4
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Part Number:
pef20320HV3.4R
Manufacturer:
SIEMENS
Quantity:
5 510
Part Number:
pef20320HV3.4R
Manufacturer:
SIEMENS
Quantity:
5 510
}
User’s Manual
/*=== Transmit Descriptor ===============================================*/
/*=== Receive Descriptor ================================================*/
/*=== Prepare Receive Descriptor 1 to 9 =================================*/
/*=== Prepare The Last Receive Descriptor, Number 10 ====================*/
channelControl[0].lasttxdescr
munichCtrlCfg.channelSpec[channel0].frda
channelControl[0].lastrcdescr
MUNICH32_ACTION_REQUEST ();
/* the next pointer of the last txDescr points to the zero pointer
rcDescr
rcDescr ->hold
rcDescr ->no
rcDescr ->c
for ( ; txDescr ->next; txDescr
{
}
txDescr ->fe
txDescr ->hold
for ( ; rcDescr ->next; rcDescr
{
}
rcDescr ->hi
rcDescr ->fe
txDescr ->hi
txDescr ->fnum
txDescr ->hold
txDescr ->fe
txDescr ->v110
rcDescr ->hold = 0;
rcDescr ->hi
rcDescr ->no
rcDescr ->fe
rcDescr ->c
= AllocReceiveDescriptor(10);
= 0;
= 1;
= 1;
= 32;
= 0;
= 0;
= 0;
= 32;
= 0;
= 0;
= 3;
= 0;
= 1;
= 0;
= 0;
= 1;
= txDescr; /* store last transmit pointer */
= rcDescr; /* store last receive pointer
/* generate MUNICH32 activation request */
= txDescr ->next )
= rcDescr ->next )
/* clear host initiated interrupt bit */
251
/* 3 interframe timefill char
/* clear frame end bit
/* set frame end bit
/* clear hold bit
/* clear v110 bit
/* set hold bit
/* clear data section complete bit */
/* clear data section complete bit */
/* not the last descriptor
/* last available descriptor
/* no host interrupt
/* 32 data byte available
/* clear frame end bit
/* no host interrupt
/* 32 data byte available
/* clear frame end bit
= rcDescr; /* first receive
/* with 32 data byte each
/* receive descriptors
/* Alloc e.g. ten
/* descriptor address */
PEB 20320
Appendix
01.2000
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/

Related parts for pef20320