pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 228

• Manufacturer Part Number: pef20320
• Description: Multichannel Network Interface Controller For Hdlc With 32 Channels
• Manufacturer: Infineon Technologies Corporation

User’s Manual
The TSP pulse must be derived from the F0 signal with a phase shift by 255 clock cycles
to be at the right position. The corresponding timing is illustrated in the following diagram.
Figure 117
C2
F0
TSP
RSP
RCLK=TCLK=C2
TDATA
=STi
RDATA
=STo
*)
*)
*)
Derived from F0 and synchronized by means of C2
= : Invalid area
: =
Channel 0, Bit 0 (Least Significant Bit)
228
ITD04693
Application Hints
PEB 20320
01.2000