pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 109

• Manufacturer Part Number: pef20320
• Description: Multichannel Network Interface Controller For Hdlc With 32 Channels
• Manufacturer: Infineon Technologies Corporation

TMA
Receive Direction
General Features
In the receive direction
– a slot synchronous transparent data reception
– a ‘1’ overwrite for masked bits in the slot
– for FA = ‘1’ a slot synchronous programmable flag extraction
is performed automatically.
Options
The different options for this mode are:
– the programmable character TC to be extracted for FA = ‘1’ is TFLAG. For FA = ‘0’
Interrupts
The possible interrupts for the mode in receive direction are:
HI:
ERR: issued if a fast receive abort channel command was issued.
FO: issued if data could only partially stored due to internal buffer overflow of RB.
Example 1:
(no subchanneling)
TMA channel with
User’s Manual
nothing is extracted. If subchanneling is chosen (not all fill/mask bits of the channel
are ‘1’) FA must be set to ‘0’.
TFLAG = D7
INV = 0
CRC = 0
TRV = 00
FA = 1
MODE = 00
IFTF = 0
Motorola interface
Channel No. E
issued if the HI bit is detected in the receive descriptor (not maskable).
(maskable by RE in the channel spec.)
(maskable by RE in the channel spec.)
(required)
(required)
(TMA)
(no channel inversion)
109
Functional Description
PEB 20320
01.2000