pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 51

• Manufacturer Part Number: pef20320
• Description: Multichannel Network Interface Controller For Hdlc With 32 Channels
• Manufacturer: Infineon Technologies Corporation

The receive buffer (RB) is a FIFO buffer and also has a size of 64 long words, which
allows storing the data of eight complete PCM frames before transferring to the shared
memory.
Figure 27
Partitioning of RB
The data transfer to the shared memory is performed via a 32-bit microprocessor
interface working either in SIEMENS/Intel or Motorola bus mode. Figure 28 shows the
division of the shared memory required for each MUNICH32:
– Configuration start address located at a programmable address
– Control and configuration section
– An interrupt circular queue with variable size
– Descriptor and data sections for each channel.
User’s Manual
Stored in RB
together with Data/Status
Word from RD
CD
51
RD
RB
Active Receive
Channel (internal)
Functional Description
64 Long Words
ITD04447
PEB 20320
01.2000