pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 63
pef20320
Manufacturer Part Number
pef20320
Description
Multichannel Network Interface Controller For Hdlc With 32 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF20320.pdf
(252 pages)
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An activated transmission hold (hold bit in descriptor) prevents the MUNICH32 from
sending more data. If a frame end has not occurred just before, the current frame will be
aborted and an interrupt generated. Afterwards, the interframe time-fill bytes will be
issued until the transmission hold indication is cleared. There is a further transmit hold
(TH) bit in the Channel Specification (CCS) in addition to the hold bit in the descriptor.
Setting the transmit hold (TH) bit by issuing a channel command will prevent further
polling of the transmit descriptor (see Chapter 5.3.2).
This hold bit (CCS.TH) is interpreted in the CD; it causes the transmit formatter to stay
in the idle state and to send interframe time-fill after finishing the current frame. In the
case of a very short frame (< ITBS), this frame will stay in the TF and not be sent until
CCS.TH is removed. (In case of X.30/V.110 the current frame is aborted).
This means that the buffer TB is not emptied from the TF side after the current frame,
but still requests further data from the shared memory until it is filled. In the case of the
descriptor hold on the other hand, the TF empties the TB and there are no further data
requests from the shared memory until the descriptor hold is withdrawn. Then TB is filled
again and the TF is activated only after enough data are provided in the TB to prevent a
data underrun.
The Reaction to the Transmit Hold Bit is now Discussed for the Different Modes in
the Following Sections
Variable Size Frame Oriented Protocols (HDLC, TMB, TMR)
Reaction to a channel specification containing TH = 1
Normal operation
Note: 1. IC = 7E
User’s Manual
2. flag = 7E
3. FNUM2 is ignored. The number of interframe time-fills sent between the first
4. The times
5. The TH bit (as all channel commands) is
6. If TH is handed over to CD outside of a frame, TH = 1 prevents the MUNICH32
frame and the second frame solely depends on the AR low pulse leading to the
action with the channel with TH = 0.
opposed to the H-bit in the descriptor) TH acts on the frame currently being
sent, not necessarily on the last frame currently stored in the TB. In the
example, TB may or may not have stored DATA 3 before the action request
with TH = 1 was issued. See Chapter 4.2.5 for a further discussion of this
issue.
from sending the next frame.
FF
00
00
H
H
H
H
for TMB or TMR
H
for HDLC and IFTF = 0
for HDLC and IFTF = 1
for TMB or TMR
for HDLC
t
1
and
t
2
are statistical but typically only a few clock cycles.
63
not
synchronized with TB! (as
Functional Description
PEB 20320
01.2000
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