pef20320 Infineon Technologies Corporation, pef20320 Datasheet - Page 130

• Manufacturer Part Number: pef20320
• Description: Multichannel Network Interface Controller For Hdlc With 32 Channels
• Manufacturer: Infineon Technologies Corporation

User’s Manual
Table 7
Boundary Scan Test Modes
Instruction (Bit 2 … 0)
000
001
010
011
111
others
EXTEST is used to examine the interconnection of the devices on the board. In this test
mode at first all input pins capture the current level on the corresponding external
interconnection line, whereas all output pins are held at constant values (‘0’ or ‘1’,
according to Table 6). Then the content of the boundary scan is shifted to JTEST3
(TDO). At the same time the next scan vector is loaded from JTEST2 (TDI).
Subsequently all output pins are updated according to the new boundary scan contents
and all input pins again capture the current external level afterwards, and so on.
INTEST supports internal testing of the chip, i.e. the output pins capture the current level
on the corresponding internal line whereas all input pins are held on constant values (‘0’
or ‘1’, according to Table 6). The resulting boundary scan vector is shifted to JTEST3
(TDO). The next test vector is serially loaded via JTEST2 (TDI). Then all input pins are
updated for the following test cycle.
Note: In capture IR-state the code ‘001’ is automatically loaded into the instruction
SAMPLE/PRELOAD is a test mode which provides a snap-shot of pin levels during
normal operation.
IDCODE: A 32-bit identification register is serially read out via JTEST3 (TDO). It contains
the version number (4 bits), the device code (16 bits) and the manufacturer code
(11 bits). The LSB is fixed to ‘1’.
JTEST2 (TDI)
IDCODE for old versions:
Note: As in test logic reset state the code ‘011’ is automatically loaded into the instruction
BYPASS: A bit entering JTEST2 (TDI) is shifted to JTEST3 (TDO) after one JTEST0
(TCK) clock cycle.
register, i.e. if INTEST is wanted the shift IR-state does not need to be passed.
register the ID code can easily be read out in shift DR state which is reached by
JTEST1 (TMS) = 0, 1, 0, 0.
0110 0000 0000 0000 0101 0000 1000 001 1
Test Mode
EXTEST (external testing)
INTEST (internal testing)
SAMPLE/PRELOAD (snap-shot testing)
IDCODE (reading ID code)
BYPASS (bypass operation)
handled like BYPASS
0001 for version 2.1
0010 for version 2.2
0100 for version 3.2
130
Functional Description
JTEST3 (TDO)
PEB 20320
01.2000