AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 111
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AM79C976
Manufacturer Part Number
AM79C976
Description
PCnet-PRO 10/100 Mbps PCI Ethernet Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C976.pdf
(309 pages)
- Current page: 111 of 309
- Download datasheet (3Mb)
USER ACCESSIBLE REGISTERS
The Am79C976 controller has four types of user regis-
ters: the PCI configuration registers, the memory-
mapped registers, the Control and Status registers
(CSRs), and the Bus Control registers (BCRs). The
CSRs and BCRs are included for software compatibility
with older PCnet family devices. However, all CSR and
BCR functions can be accessed more efficiently
through the memory-mapped registers. Software writ-
ten for the Am79C976 device and future PCnet family
devices does not have to access any CSR or BCR.
The Am79C976 controller implements all PCnet-ISA
(Am79C960) registers, all C-LANCE (Am79C90) regis-
ters, all PCnet-FAST (Am79C971) registers, plus a
number of additional registers. The Am79C976 CSRs
are compatible upon power up with both the PCnet-ISA
CSRs and all of the C-LANCE CSRs.
The PCI configuration registers and the memory-
mapped registers can be accessed in any data width.
The CSRs and BCRs must be accessed according to
the I/O mode that is currently selected. When WIO
mode is selected, all CSR and BCR locations are de-
fined to be 16 bits in width. When DWIO mode is se-
lected, all these register locations are defined to be 32
bits in width, with the upper 16 bits of most register lo-
cations marked as reserved locations with undefined
values. When performing register write operations in
DWIO mode, the upper 16 bits should always be written
as zeros. When performing register read operations in
DWIO mode, the upper 16 bits of I/O resources should
always be regarded as having undefined values, ex-
cept for CSR88.
The Am79C976 controller’s registers can be divided
into several functional groups: PCI Configuration Alias
registers, PCI Configuration registers, Setup registers,
Running registers, and Test registers.
The PCI Configuration Alias registers are typically pro-
grammed through the EEPROM read operation. In this
way, they are initialized before the BIOS accesses the
PCI Configuration registers. This group includes the
MAX_LAT_A, MIN_GNT_A, PCIDATA0 - 7, PMC_A,
SID_A, SV ID_A a nd V ID_A regi sters and th e
ROM_CFG register.
The PCI Configuration registers are accessed by the
system BIOS software to configure the Am79C976
controller. These registers include the Memory Base
Address register, the Expansion ROM Base Address
register, the Interrupt Line register, the PCI Command
register, the PCI Status register and the PMC register.
Typically, device information will also be read from the
SID, SVID and VID registers.
The Setup registers include most of the remaining
memory mapped registers. The programming of these
is typically divided between the EEPROM and the
8/01/00
P R E L I M I N A R Y
Am79C976
driver software. Many of these registers are optional
and need not be initialized unless the associated func-
tion is used.
Typically, the SRAM_SIZE, SRAM_BND and PADR
registers are initialized from the EEPROM. The driver
initializes the BADR, BADX, RCV_RING_LEN,
XMT_RING_LEN and LADRF registers. The CMD2,
CMD3, CTRL0, CTRL1 and CTRL2 registers are typi-
cally partially initialized from the EEPROM and partially
by the driver. The CMD7 and CTRL3 registers are ini-
t i a l i z e d by t h e d r i v e r. T h e d r i v e r r e a d s t h e
MIB_OFFSET and CHIPID registers at initialization
time. The PHY_ACCESS register may be used at this
time to initialize the external PHY.
Running registers are accessed by the driver software.
These include the CMD0, INT0, INTEN0, STAT0,
LADRF and MIB registers. The driver may access other
registers during operation depending on the features
being used.
PCI Configuration Registers
Offset 00h
The PCI Vendor ID register is a 16-bit register that iden-
tifies the manufacturer of the Am79C976 controller.
AMD’s Vendor ID is 1022h. Note that this vendor ID is
not the same as the Manufacturer ID in CSR88 and
CSR89. The vendor ID is assigned by the PCI Special
Interest Group.
The PCI Vendor ID register is read only.
This register is the same as BCR35, which can be writ-
ten by the EEPROM.
Offset 02h
The PCI Device ID register is a 16-bit register that
uniquely identifies the Am79C976 controller within
AMD's product line. The Am79C976 Device ID is
2000h. Note that this Device ID is not the same as the
Part number in CSR88 and CSR89. The Device ID is
assigned by AMD. The Device ID is the same as the
PC net -P CI I I ( Am 79C9 70 A) an d P Cne t- FAS T
(Am79C971) devices.
The PCI Device ID register is read only.
Offset 04h
The PCI Command register is a 16-bit register used to
control the gross functionality of the Am79C976 con-
troller. It controls the Am79C976 controller's ability to
generate and respond to PCI bus cycles. To logically
disconnect the Am79C976 device from all PCI bus cy-
cles except configuration cycles, a value of 0 should be
written to this register.
111
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