AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 192
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AM79C976
Manufacturer Part Number
AM79C976
Description
PCnet-PRO 10/100 Mbps PCI Ethernet Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C976.pdf
(309 pages)
- Current page: 192 of 309
- Download datasheet (3Mb)
11-10
192
Table 86. Receive Watermark Programming
RCVFW[1:0]
XMTSP[1:0] Transmit Start Point. XMTSP
00
01
10
11
Read/Write
RCVFW[1:0] is set to a value of
01b (64 bytes) after H_RESET or
S_RESET and is unaffected by
STOP.
controls the point at which pre-
amble transmission attempts to
commence in relation to the num-
ber of bytes written to the MAC
Transmit FIFO for the current
transmit frame. When the entire
frame is in the MAC Transmit
FIFO, transmission will start re-
gardless of the value in XMTSP.
If the network interface is operat-
ing in half-duplex mode, regard-
less of XMTSP, the FIFO will not
internally overwrite its data until
at least 64 bytes (or the entire
frame if shorter than 64 bytes)
have been transmitted onto the
network. This ensures that for
collisions within the slot time win-
dow, transmit data need not be
rewritten to the Transmit FIFO,
and retries will be handled auton-
omously by the MAC. If the Dis-
able Retry feature is enabled, or if
the network is operating in full-
duplex mode, the Am79C976
controller can overwrite the be-
ginning of the frame as soon as
the data is transmitted, because
no collision handling is required
in these modes.
Note that when the No Underflow
(NOUFLO) bit (BCR18, bit 11) is
set to 1, there is the additional re-
striction that the complete trans-
mit frame must be DMA’d into the
Am79C976 controller and reside
within the MAC Transmit FIFO.
Bytes Received
128
256
48
64
P R E L I M I N A R Y
accessible.
Am79C976
9-8
7-0
XMTSP[1:0]
Table 88. Transmit Watermark Programming
Table 87. Transmit Start Point Programming
XX
00
01
10
DMATC[7:0]Obsolete function. Writing has no
XMTFW[1:0] Transmit FIFO Watermark. XMT-
11
XMTFW[1:0]
00
01
10
11
NOUFLO
This mode is useful in a system
where high latencies cannot be
avoided. See Table 87.
Read/Write accessible. XMTSP
is set to a value of 01b (64 bytes)
after H_RESET or S_RESET and
is unaffected by STOP.
Read/Write accessible. XMTFW
is set to a value of 00b (16 bytes)
after H_RESET or S_RESET and
is unaffected by STOP.
FW specifies the point at which
transmit
based upon the number of bytes
that could be written to the Trans-
mit FIFO without FIFO overflow.
Transmit DMA is requested at
any time when the number of
bytes specified by XMTFW could
be written to the FIFO without
causing Transmit FIFO overflow,
and the internal state machine
has reached a point where the
Transmit FIFO is checked to de-
termine if DMA servicing is re-
quired. See Table 88.
effect. Read as undefined.
0
0
0
0
1
DMA
Bytes Available
Bytes Written
Full Frame
Full Frame
128
256
16
64
is
128
16
64
requested,
8/01/00
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