AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 120
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AM79C976
Manufacturer Part Number
AM79C976
Description
PCnet-PRO 10/100 Mbps PCI Ethernet Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C976.pdf
(309 pages)
- Current page: 120 of 309
- Download datasheet (3Mb)
3
2-0
Offset 48h
Bit
15
120
PME_CLK
PMIS_VER Power Management Interface
Name
PME_STATUS
it indicates that the function relies
on the presence of the PCI clock
for PME operation. When this bit
is a 0 it indicates that no PCI
clock is required for the function
to generate PME.
PME generation in any state
must return 0 for this field.
Specification Version. A value of
010b indicates that this function
complies with the revision 1.1 of
the PCI Power Management In-
terface Specification.
PME Status. This bit is set when
the function would normally as-
sert the PME signal independent
of the state of the PME_EN bit.
and cause the function to stop as-
serting a PME (if enabled). Writ-
ing a 0 has no effect.
D3cold then this bit is sticky and
must be explicitly cleared by the
operating system each time the
operating system is initially load-
ed.
This
S_RESET or setting the STOP bit
has no effect. If the function does
not support PME# assertion from
D3cold, either because bit 15 of
the PMC Alias register is zero or
the VAUX_SENSE pin is low,
PME_STATUS will be reset fol-
lowing H_RESET. This reset is
actually done at the end of the
EEPROM read operation, since
bit 15 of the PMC Alias register
PME Clock. When this bit is a 1,
Functions that do not support
Read only.
Writing a 1 to this bit will clear it
If the function supports PME from
Read/write accessible. Sticky bit.
Description
bit is
reset by
P R E L I M I N A R Y
POR.
Am79C976
14-13 DATA_SCALE
12-9
8
7-2
1-0
DATA_SEL Data Select. This optional four-bit
PME_EN
RES
PWR_STATE
may be loaded from the EE-
PROM.
only field indicates the scaling
factor to be used when interpret-
ing the value of the Data register.
The value and meaning of this
field will vary depending on the
DATA_SCALE field.
field is used to select which data
is reported through the Data reg-
ister and DATA_SCALE field.
This
H_RESET, S_RESET, or setting
the STOP bit has no effect.
PME_EN enables the function to
assert PME. When a 0, PME as-
sertion is disabled.
tion does not support PME gener-
ation from D3cold.
D3cold, then this bit is sticky and
must be explicitly cleared by the
operating system each time the
operating system is initially load-
ed.
This
S_RESET or setting the STOP bit
has no effect. If the function does
not support PME assertion from
D3cold, either because bit 15 of
the PMC Alias register is zero or
the VAUX_SENSE pin is low,
PME_STATUS will be reset fol-
lowing H_RESET. This reset is
actually done at the end of the
EEPROM read operation, since
bit 15 of the PMC Alias register
may
EEPROM.
Data Scale. This two bit read-
Read only.
Read/write accessible. Sticky bit.
PME
This bit defaults to “0” if the func-
If the function supports PME from
Read/write accessible. Sticky bit.
Reserved locations. Read only.
bit is
bit is
be
Enable.
loaded
reset by
reset by
When
from
8/01/00
a
POR.
POR.
the
1,
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