AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 189

• Manufacturer Part Number: AM79C976
• Description: PCnet-PRO 10/100 Mbps PCI Ethernet Controller
• Manufacturer: Advanced Micro Devices

Bit
31-0
This register is an alias of the location BCR20. Accesses
to and from this register are equivalent to accesses to
BCR20.
Bit
31-16
15-11
10
9
8
8/01/00
Name
RES
Name
RES
RES
APERREN Obsolete function. Writing has no
RES
SSIZE32
part of the alternative initialization
sequence.
Read/Write accessible. These
bits are unaffected by H_RESET,
S_RESET, or STOP.
zeros and read as undefined.
zeros and read as undefined.
zeros and read as undefined.
effect. Read as undefined.
zeros and read as undefined.
this
Am79C976 controller utilizes 32-
bit software structures for the ini-
tialization block and the transmit
and receive descriptor entries.
When cleared, this bit indicates
that the Am79C976 controller uti-
lizes 16-bit software structures
for the initialization block and the
transmit and receive descriptor
entries.
Am79C976 controller is back-
wards
Am7990 LANCE and Am79C960
PCnet-ISA controllers.
The value of SSIZE32 is deter-
mined by the Am79C976 control-
ler according to the setting of the
Software Style (SWSTYLE, bits
7-0 of this register).
SSIZE32 is read only; write oper-
ations will be ignored. SSIZE32
will be cleared after H_RESET
(since SWSTYLE defaults to 0)
Reserved locations. Written as
Reserved locations. Written as
Reserved locations. Written as
Reserved locations. Written as
Software Size 32 bits. When set,
Description
Description
bit
compatible
In
indicates
this
mode,
P R E L I M I N A R Y
with
that
the
the
the
Am79C976
7-0
SWSTYLE
and is not affected by S_RESET
or STOP.
If SSIZE32 is reset, then bits
IADR[31:24] of CSR2 will be
used to generate values for the
upper 8 bits of the 32-bit address
bus during master accesses initi-
ated by the Am79C976 controller.
This action is required, since the
16-bit software structures speci-
fied by the SSIZE32 = 0 setting
will yield only 24 bits of address
for the Am79C976 controller bus
master accesses.
If SSIZE32 is set, then the soft-
ware structures that are common
to the Am79C976 controller and
the host system will supply a full
32 bits for each address pointer
that is needed by the Am79C976
controller for performing master
accesses.
The value of the SSIZE32 bit has
no effect on the drive of the upper
8 address bits. The upper 8 ad-
dress pins are always driven, re-
gardless of the state of the
SSIZE32 bit.
Note that the setting of the
SSIZE32 bit has no effect on the
defined width for I/O resources.
I/O resource width is determined
by the state of the DWIO bit
(BCR18, bit 7).
All Am79C976 controller CSR
bits and BCR bits and all descrip-
tor, buffer, and initialization block
entries not cited in Table 85 are
unaffected by the Software Style
selection and are, therefore, al-
ways fully functional as specified
in the CSR and BCR sections.
ue in this register determines the
style of register and memory re-
sources that shall be used by the
Am79C976 controller. The Soft-
ware Style selection will affect the
interpretation of a few bits within
the CSR space, the order of the
descriptor entries and the width
of the descriptors and initializa-
tion block entries.
Software Style register. The val-
189