AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 202
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AM79C976
Manufacturer Part Number
AM79C976
Description
PCnet-PRO 10/100 Mbps PCI Ethernet Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C976.pdf
(309 pages)
- Current page: 202 of 309
- Download datasheet (3Mb)
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202
LEDPOL
LEDDIS
The logical value of the LEDOUT
status signal is determined by the
settings of the individual Status
Enable bits of the LED register
(bits 8 and 6-0).
This bit is read only, writes have
no effect. LEDOUT is unaffected
by H_RESET, S_RESET, or
STOP.
the value 0, then the LED pin will
be driven to a LOW level whenev-
er the OR of the enabled signals
is true, and the LED pin will be
disabled and allowed to float high
whenever the OR of the enabled
signals is false (i.e., the LED out-
put will be an Open Drain output
and the output value will be the
inverse of the LEDOUT status
bit).
When this bit has the value 1,
then the LED pin will be driven to
a HIGH level whenever the OR of
the enabled signals is true, and
the LED pin will be driven to a
LOW level whenever the OR of
the enabled signals is false (i.e.,
the LED output will be a Totem
Pole output and the output value
will be the same polarity as the
LEDOUT status bit).
The setting of this bit will not ef-
fect the polarity of the LEDOUT
bit for this register.
Read/Write accessible. LEDPOL
is cleared by H_RESET and is
not affected by S_RESET or set-
ting the STOP bit.
disable the LED output. When
LEDDIS has the value 1, then the
LED output will always be dis-
abled. When LEDDIS has the val-
ue 0, then the LED output value
will be governed by the LEDOUT
and LEDPOL values.
Read/Write accessible. LEDDIS
is cleared by H_RESET and is
not affected by S_RESET or set-
ting the STOP bit.
LED Polarity. When this bit has
LED Disable. This bit is used to
P R E L I M I N A R Y
Am79C976
12
11-10 RES
9
8
7
100E
MPSE
FDLSE
PSE
Read/Write accessible. 100E is
cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
Read/Write accessible. MPSE is
cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
Read/Write accessible. FDLSE is
cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
Read/Write accessible. PSE is
set to 1 by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
is set to 1, a value of 1 is passed
to the LEDOUT bit in this register
when the Am79C976 controller is
operating at 100 Mbps mode.
read as zeros.
When this bit is set to 1, a value
of 1 is passed to the LEDOUT bit
in this register when Magic Pack-
et mode is enabled and a Magic
Packet frame is detected on the
network.
Full-Duplex Link Status Enable.
Indicates the Full-Duplex Link
Test Status. When this bit is set,
a value of 1 is passed to the LED-
OUT signal when the Am79C976
controller is functioning in a Link
Pass state and full-duplex opera-
tion
Am79C976 controller is not func-
tioning in a Link Pass state with
full-duplex operation being en-
abled, a value of 0 is passed to
the LEDOUT signal.
this bit is set, the LED illumination
time is extended for each new oc-
currence of the enabled function
for this LED output. A value of 0
disables the pulse stretcher.
100 Mbps Enable. When this bit
Reserved locations. Written and
Magic Packet Status Enable.
Pulse Stretcher Enable. When
is
enabled.
When
8/01/00
the
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