AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 160

• Manufacturer Part Number: AM79C976
• Description: PCnet-PRO 10/100 Mbps PCI Ethernet Controller
• Manufacturer: Advanced Micro Devices

MAX_LAT_A: PCI Maximum Latency Alias Register
Offset 1B1h
This register is a writable alias of the Maximum Latency
field at offset 3Fh in PCI configuration space, which is
read only. The purpose of this register is to allow the
Offset 1B0h
This register is a writable alias of the Minimum Grant
field at offset 3Eh in PCI configuration space, which is
read only. The purpose of this register is to allow the
Offset 160h
160
7-0
7-0
Bit
Bit
MAX_LAT
MIN_GNT
Name
Name
Table 64. MAX_LAT_A: PCI Maximum Latency Alias Register
Maximum Latency. Specifies the maximum arbitration latency the Am79C976 controller can
sustain without causing problems to the network activity. The register value specifies the time in
units of
MAX_LAT (offset 3Fh). The host will use the value in the register to determine the setting of the
Am79C976 Latency Timer register.
The default value for MAX_LAT is 18h which corresponds to 6 ms.
This register is an alias of BCR22, bits [15:8] and of offset 3Fh in PCI configuration space.
Table 65. MIN_GNT_A: PCI Minimum Grant Alias Register
Minimum Grant. Specifies the minimum length of a burst period the Am79C976 controller needs to
keep up with the network activity. The length of the burst period is calculated assuming a clock rate
of 33 MHz. The register value specifies the time in units of 1/4 ms. MIN_GNT is aliased to the PCI
configuration space register MIN_GNT (offset 3Eh). The host will use the value in the register to
determine the setting of the Am79C976 Latency Timer register.
The default value for MIN_GNT is 18h which corresponds to 6 ms.
This register is an alias of BCR22, bits [7:0] and of offset 3Eh in PCI configuration space.
1/4 microseconds. MAX_LAT is aliased to the PCI configuration space register
P R E L I M I N A R Y
Am79C976
PCI Maximum Latency value to be loaded from the se-
rial EEPROM.
The contents of this register are set to 18h when the
RST pin is asserted, before the serial EEPROM is
read, and after a serial EEPROM read error.
PCI Minimum Grant value to be loaded from the serial
EEPROM.
The contents of this register are set to 18h when the
RST pin is asserted, before the serial EEPROM is
read, and after a serial EEPROM read error.
The contents of this register are cleared to 0 when the
RST pin is asserted. This register is not cleared by the
serial EEPROM read operation or by a serial EEPROM
read error.
Description
Description
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