AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 296
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AM79C976
Manufacturer Part Number
AM79C976
Description
PCnet-PRO 10/100 Mbps PCI Ethernet Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C976.pdf
(309 pages)
- Current page: 296 of 309
- Download datasheet (3Mb)
APPENDIX B: MII MANAGEMENT REGISTERS
As specified in the IEEE standard, the basic register
set consists of the Control Register (Register 0) and
the Status Register (Register 1). The extended register
set consists of Registers 2 to 31 (decimal). All PHYs
that provide an MII shall incorporate the basic register
set. Both sets of registers are accessible through the
MII Management Interface.
Table 1 lists the most interesting registers.
Control Register (Register 0)
Table 2 shows the MII Management Control Register
(Register 0).
6-0
15
14
13
12
11
10
9
8
7
APPENDIX B
Restart Auto-Negotiation
Auto-Negotiation Enable
Speed Selection
Duplex Mode
Collision Test
Power Down
Soft Reset
Loopback
Reserved
Isolate
Table B-2. MII Management Control Register (Register 0)
When write:
1 = PHY software reset
0 = normal operation
When read:
1 = reset in process
0 = reset done
1 = enables Loopback mode
0 = disables Loopback mode
1 = 100 Mbps
0 = 10 Mbps
1 = enable Auto-Negotiation
0 = disable Auto-Negotiation
1 = power down, 0 = normal operation
1 = electrically isolate PHY from MII
0 = normal operation
1 = restart Auto-Negotiation
0 = normal operation
1 = full duplex
0 = half duplex
1 = enable COL signal test
0 = disable COL signal test
Write as 0, ignore on read
Register
Address
Table B-1. MII Management Register Set
2-3
0
1
4
5
Auto-Negotiation Link
Auto-Negotiation
Register Name
Advertisement
PHY Identifier
Partner Ability
MII Control
MII Status
R/W, SC
R/W, SC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Extended
RO
Basic/
B
B
E
E
E
B
-
1
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