AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 114
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AM79C976
Manufacturer Part Number
AM79C976
Description
PCnet-PRO 10/100 Mbps PCI Ethernet Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C976.pdf
(309 pages)
- Current page: 114 of 309
- Download datasheet (3Mb)
11
10-9
8
7
114
STABORT
DEVSEL
DATAPERR Data
FBTBC
cleared by writing a 1. Writing a 0
has no effect. RTABORT is
cleared by H_RESET and is not
affected by S_RESET or by set-
ting the STOP bit.
ro; write operations have no ef-
fect. The Am79C976 controller
will never terminate a slave ac-
cess with a target abort se-
quence.
STABORT is read only.
is set to 01b (medium), which
means that the Am79C976 con-
troller will assert DEVSEL two
clock periods after FRAME is as-
serted.
DEVSEL is read only.
DATAPERR is set when the
Am79C976 controller is the cur-
rent bus master and it detects a
data parity error and the Parity
Error Response enable bit (PCI
Command register, bit 6) is set.
During the data phase of all
memory read commands, the
Am79C976 controller checks for
parity error by sampling the
AD[31:0] and C/BE[3:0] and the
PAR lines. During the data phase
of all memory write commands,
the Am79C976 controller checks
the PERR input to detect whether
the target has reported a parity
error.
DATAPERR
Am79C976
cleared by writing a 1. Writing a 0
has no effect. DATAPERR is
cleared by H_RESET and is not
affected by S_RESET or by set-
ting the STOP bit.
Read as one; write operations
have no effect. The Am79C976
controller is capable of accepting
fast back-to-back transactions
with the first transaction address-
ing a different target.
Send Target Abort. Read as ze-
Device Select Timing. DEVSEL
Fast
Back-To-Back
Parity
is
controller
Error
set
P R E L I M I N A R Y
Detected.
Capable.
by
and
the
Am79C976
6-5
4
3-0
Offset 08h
The PCI Revision ID register is an 8-bit register that
specifies the Am79C976 controller revision number.
The value of this register is 5Xh with the lower four bits
being silicon-revision dependent.
The PCI Revision ID register is read only.
Offset 09h
The PCI Programming Interface register is an 8-bit reg-
ister that identifies the programming interface of
Am79C976 controller. PCI does not define any specific
register-level programming interfaces for network devic-
es. The value of this register is 00h.
The PCI Programming Interface register is read only.
Offset 0Ah
The PCI Sub-Class register is an 8-bit register that iden-
tifies specifically the function of the Am79C976 control-
ler. The value of this register is 00h which identifies the
Am79C976 device as an Ethernet controller.
The PCI Sub-Class register is read only.
Offset 0Bh
The PCI Base-Class register is an 8-bit register that
broadly classifies the function of the Am79C976 con-
troller. The value of this register is 02h which classifies
the Am79C976 device as a network controller.
The PCI Base-Class register is read only.
RES
NEW_CAP New Capabilities. This bit indi-
RES
zero; write operations have no ef-
fect.
cates whether this function imple-
ments
capabilities such as PCI power
management. When set, this bit
indicates the presence of New
Capabilities. A value of 0 means
that this function does not imple-
ment New Capabilities.
have no effect. The Am79C976
controller supports the Linked
Additional Capabilities List.
zero; write operations have no ef-
fect.
Reserved locations. Read as
Read as one; write operations
Reserved locations. Read as
a
list
of
extended
8/01/00
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