AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 98
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AM79C976
Manufacturer Part Number
AM79C976
Description
PCnet-PRO 10/100 Mbps PCI Ethernet Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C976.pdf
(309 pages)
- Current page: 98 of 309
- Download datasheet (3Mb)
Note: All registers are restored to their default values,
not just those registers that were altered by the EE-
PROM read operation.
If the Am79C976 device detects a correct CRC code, it
sets the PVALID bit to 1 to indicate that the registers
have been successfully initialized.
The CPU can initiate an automatic EEPROM read op-
eration at any time by setting the PREAD bit in BCR19
to 1.
The CPU cannot access any Am79C976 register while
an automatic EEPROM read operation is in progress. If
the CPU attempts to access a register during this time,
the Am79C976 controller will terminate the access at-
tempt by asserting DEVSEL and STOP while TRDY is
not asserted, a combination that indicates that the initi-
ator must disconnect and retry the access at a later
time. The automatic read operation takes about 180 µs
for each 16-bit register that is initialized plus 180 µs for
the CRC code word.
When the address field of an EEPROM instruction is
shifted in through the DI pin of the EEPROM, the
EEPROM drives its DO pin low when the A0 bit ap-
pears on the DI pin. The Am79C976 controller makes
LED Support
The Am79C976 controller can support up to four LEDs.
LED outputs LED0, LED1, and LED2 allow for direct
connection of an LED and its supporting pull-up device.
In applications that want to use the pin to drive an LED
and also have an EEPROM, it might be necessary to
buffer the LED3 circuit from the EEPROM connection.
When an LED circuit is directly connected to the
98
x 16
+
x 15
+
15
ADR1
Am79C976 Controller
Holding Register
CRC LOGIC
...
DATA[15:8]
P R E L I M I N A R Y
x 2
+
0
Am79C976
use of this feature to detect the presence of an
EEPROM. When the device attempts to read the first
word from the EEPROM and if the EEDO pin is not
driven low before the 15th EESK clock cycle, the device
assumes that there is no EEPROM present.
The user can directly access the port through the
EEPROM Access Register (BCR19). This register con-
tains bits that can be used to control the interface pins.
By performing an appropriate sequence of accesses to
BCR19, the user can effectively write to and read from
the EEPROM. This feature may be used by a system
configuration utility to program hardware configuration
information into the EEPROM.
The EEPROM interface logic first shifts each 16-bit
word from the EEPROM most significant bit first into an
internal holding register. Then it shifts the word through
the CRC logic least significant bit first, effectively swap-
ping the bytes. Therefore, the data shown in Figure 42
are processed by the CRC logic in the following order:
DATA[15:8], ADR1, ADR2, DATA[7:0], DATA[7:0],
DATA[15:8], ... .
EEDO/LED3/RXFRTGD pin, then it is not possible for
most EEPROM devices to sink enough I
a valid low level on the EEDO input to the Am79C976
controller. Use of buffering can be avoided if a low
power LED is used.
Each LED can be programmed through a BCR register
to indicate one or more of the following network
statuses or activities: Collision Status, Full-Duplex Link
15
DATA[15:8]
DATA[7:0]
ADR1
ADR3
EEPROM
.
.
.
DATA[15:8]
DATA[15:8]
DATA[7:0]
ADR2
0
OL
to maintain
8/01/00
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