AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 210
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AM79C976
Manufacturer Part Number
AM79C976
Description
PCnet-PRO 10/100 Mbps PCI Ethernet Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C976.pdf
(309 pages)
- Current page: 210 of 309
- Download datasheet (3Mb)
210
read operation of the EEPROM
through the interface. The EE-
PROM data that is fetched during
the read will be stored in the ap-
propriate internal registers on
board the Am79C976 controller.
Upon completion of the EEPROM
read operation, the Am79C976
controller will assert the PVALID
bit. EEPROM contents will be in-
directly accessible to the host
through read accesses to the Ad-
dress PROM (offsets 0h through
Fh) and through read accesses to
other EEPROM programmable
registers. Note that read access-
es from these locations will not
actually access the EEPROM it-
self, but instead will access the
Am79C976 controller’s internal
copy of the EEPROM contents.
Write accesses to these locations
may change the Am79C976 con-
troller register contents, but the
EEPROM locations will not be af-
fected. EEPROM locations may
be accessed directly through
BCR19.
At the end of the sequential read
operation, the PREAD bit will au-
tomatically be reset to a 0 by the
Am79C976
PVALID will be set, provided that
an EEPROM existed on the inter-
face pins and that the checksum
for the EEPROM contents was
correct.
Note that when PREAD is set to a
1, then the Am79C976 controller
will no longer respond to any ac-
cesses directed toward it, until
the PREAD operation has com-
pleted
Am79C976 controller will termi-
nate these accesses with the as-
sertion of DEVSEL and STOP
while TRDY is not asserted, sig-
naling to the initiator to discon-
nect and retry the access at a
later time.
If a PREAD command is given to
the Am79C976 controller but no
EEPROM is attached to the inter-
face pins, the PREAD bit will be
cleared to a 0, and the PVALID bit
successfully.
controller
P R E L I M I N A R Y
The
and
Am79C976
13
EEDET
will remain reset with a value of 0.
This applies to the automatic, se-
quential read of the EEPROM af-
ter H_RESET as well as to host
initiated PREAD commands. EE-
PROM programmable locations
on board the Am79C976 control-
ler will be set to their default val-
ues by such an aborted PREAD
operation. For example, if the
aborted PREAD operation imme-
diately followed the H_RESET
operation, then the final state of
the EEPROM programmable lo-
cations will be equal to the
H_RESET
those locations.
If a PREAD command is given to
the Am79C976 controller and the
auto-detection pin (EESK/LED1/
SFBD)
EEPROM is present, then the
EEPROM read operation will still
be attempted.
Note that at the end of the
H_RESET operation, a read of
the EEPROM will be performed
automatically. This H_RESET-
generated EEPROM read func-
tion will not proceed if the auto-
detection pin (EESK/LED1) indi-
cates
present.
Read/Write accessible. PREAD
is set to 0 during H_RESET and
is unaffected by S_RESET or the
STOP bit.
EEDET is read only; write opera-
tions have no effect. The value of
this bit is determined at the end of
the H_RESET operation. It is un-
affected by S_RESET or the
STOP bit.
cates the sampled value of the
EESK/LED1 pin at the end of
H_RESET. This value indicates
whether or not an EEPROM is
present at the EEPROM inter-
face. If this bit is a 1, it indicates
that an EEPROM is present. If
this bit is a 0, it indicates that an
EEPROM is not present.
EEPROM Detect. This bit indi-
that
indicates
programming
no
EEPROM
that
8/01/00
for
no
is
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