Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 139

DEV KIT FOR Z16F ZNEO

Z16F2800100ZCOG

Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr

Specifications of Z16F2800100ZCOG

Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
Table 68. PWM 0-2 H/L Duty Cycle High Byte Register (PWMHxDH, PWMLxDH)
Table 69. PWM 0-2 H/L Duty Cycle Low Byte Register (PWMHxDL, PWMLxDL)
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Bit Position
[7]
SIGN
[6:0], [7:0]
DUTYH
and
DUTYL
PWM Control 0 Register
SIGN
R/W
7
X
7
Writing a negative value (DUTYH[7] = 1) forces the PWM to be OFF for the full PWM
period. Writing a positive value greater than the 12-bit PWM reload value forces the PWM
to be ON for the full PWM period.
The PWM control 0 register (PWMCTL0) controls PWM operation.
Value (H) Description
0
1
FF_E390H, FF_E392H, FF_E394H, FF_E396H, FF_E398H, FF_E39AH
FF_E391H, FF_E393H, FF_E395H, FF_E397H, FF_E399H, FF_E39BH
PWM Duty Cycle
6
6
Duty cycle sign
Duty cycle is a positive two’s complement number.
Duty cycle is a negative two’s complement number.
Output is forced to the off-state.
PWM duty cycle high and low bytes
These two bytes, {DUTYH[7:0], DUTYL [7:0]}, form a 14 -bit signed value
(Bits 5 and 6 of the High byte are always 0). The value is compared to the
current 12-bit PWM count.
Reserved
R/W
XX
5
5
P R E L I M I N A R Y
=
100
4
4
DUTYL
PWM Duty Cycle Value
---------------------------------------------------------- -
XXH
R/W
PWM Reload Value
3
3
X_XXXX
DUTYH
R/W
2
2
Multi-Channel PWM Timer
Product Specification
ZNEO
1
1
Z16F Series
0
0
124

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