Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 362
Z16F2800100ZCOG
Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr
Datasheets
1.Z16F2800100ZCOG.pdf
(2 pages)
2.Z16F2800100ZCOG.pdf
(30 pages)
3.Z16F2800100ZCOG.pdf
(388 pages)
Specifications of Z16F2800100ZCOG
Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
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Table 188. ADC Electrical Characteristics and Timing
Symbol Parameter
DNL
INL
VREF
AVDD
Notes
PS022008-0810
1. These parameters are guaranteed by design and not tested on every part.
2. Typical system configuration is defined as, 20 MHz clock with ADC clock divide by 4, 1 uS sample hold time,
3. On-chip voltage reference cannot be used if AVDD is below 3.0 V.
0.5 us sample settling time.
Resolution
Throughput Conversion
ADCCLK Frequency
Differential Non-Linearity
Integral Non-Linearity
Offset Error
Gain Error
On-Chip Voltage
Reference
Externally supplied
Voltage Reference
Analog Input Voltage
Range
Analog Input Current
Reference Input Current
Analog Input Capacitance
Operating Supply Voltage
Operating Current, AVDD
Power Down Current
Table 188
timing.
1
3
1
lists the Analog-to-Digital Converter (ADC) electrical characteristics and
1
1
–0.99
–4.5
Min
–30
1.9
1.9
2.7
10
13
–3
0
P R E L I M I N A R Y
T
A
= –40 °C to 125 °C
Typ
2.0
<1
—
2
2
9
VREF
Max
500
4.5
2.1
2.1
3.6
20
30
15
—
2
3
Units Conditions
CLKs ADC clock cycles
MHz
LSB
LSB
LSB
bits
mV
mA
mA
nA
pF
uA
V
V
V
V
Product Specification
Electrical Characteristics
External V
Typical system config
Typical system config
Typical system config
Typical system config
Worst case code
Active conversion @
20 MHz
ZNEO
Z16F Series
REF
= 2.0 V
2
2
2
2
346
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