Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 60

DEV KIT FOR Z16F ZNEO

Z16F2800100ZCOG

Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr

Specifications of Z16F2800100ZCOG

Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
Table 11. External Chip Select Control Registers Low for CS0 (EXTCS0L)
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
R/W
7
0
RESERVED
Reserved—These bits are reserved and must be programmed to zero.
CSEN—Chip select enable
0 = CSx is disabled
1 = CSx is enabled
POLSEx—Polarity select
0 = CSx is active Low
1 = CSx is active High
CSxISA—Chip select ISA mode enable
0 = ISA mode disabled
1 = ISA mode enabled
W/B—Word or Byte mode select per chip select for 16-bit or 8-bit peripherals
0 = External interface uses Data[15:0] for this chip select
1 = External interface uses Data[7:0] for this chip select
Table 11
register sets the number of Wait states for chip select 0. Waits are only added if the chip
select is enabled. Chip select 0 is enabled automatically in ROMLESS mode.
PR0WAIT[2:0]—Post Read Wait selection
00 = 0 Wait state
01 = 1 Wait state
10 = 2 Wait states
11 = 3 Wait states
CS0WAIT—Chip Select 0 Wait selection
0000 = 0 Wait state
0001 = 1 Wait state
0010 = 2 Wait states
0011 = 3 Wait states
0100 = 4 Wait states
0101 = 5 Wait states
0110 = 6 Wait states
lists the external chip select control registers
R/W
6
0
R/W
5
1
PR0WAIT
P R E L I M I N A R Y
R/W
4
1
FF_(E073)H
R/W
3
1
Low for CS0 (EXTCS0L).
R/W
2
1
CS0WAIT
Product Specification
ZNEO
R/W
1
1
External Interface
Z16F Series
This
R/W
0
1
45

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