Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 145

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

Table 75. PWM Fault Status Register (PWMFSTAT)
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
Bit Position
[7]
RLDFlag
[6]
Reserved
[5]
DBGFLAG
[4:3]
Reserved
[2]
F1FLAG
[1]
C0FLAG
[0]
FFLAG
Note: For this register, W1C means you must write one to clear the flag.
PWM Fault Status Register
RLDFlag
R/W1C
Value (H) Description
U
The PWM fault status (PWMFSTAT) register provides status of fault inputs and timer
reload. The fault flags indicate the fault source, which is active. If a fault source is masked,
the flag in this register is not set when the source is asserted. The reload flag is set when
the timer compare values are updated. Clear flags by writing 1 to the flag bits. Fault flag
bits are cleared only if the associated fault source has deasserted.
7
0
0
Reserved DBGFLAG
R
Reload Flag
This bit is set and latched when a PWM timer reload occurs. Writing a 1
to this bit clears the flag.
Reserved
Always reads 0.
Debug Flag
This bit is set and latched when DEBUG mode is entered. Writing a
1 to this bit clears the flag.
Reserved
Always reads 0.
Fault1 Flag
This bit is set and latched when fault1 is asserted. Writing a 1
to this bit clears the flag.
Comparator 0 Flag
This bit is set and latched when comparator is asserted. Writing a
1 to this bit clears the flag.
Fault Flag
This bit is set and latched when the fault0 input is asserted. Writing a 1
6
0
to this bit clears the flag.
R/W1C
U
5
P R E L I M I N A R Y
4
FF_E385H
Reserved
00
R
3
F1FLAG
R/W1C
U
2
Multi-Channel PWM Timer
Product Specification
ZNEO
C0FLAG
R/W1C
U
1
Z16F Series
FFLAG
R/W1C
U
0
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