Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 28

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

Table 2. Signal Descriptions (Continued)
PS022008-0810
Signal Mnemonic
WR
CS0/CS1 / CS2
CS3/CS4/CS5
BHEN/BLEN
WAIT
Direct Memory Access Controller
DMA0REQ
DMA1REQ
DMA2REQ
DMA0ACK
DMA1ACK
DMA2ACK
Inter-Integrated Circuit Controller
SCL
SDA
Enhanced Serial Peripheral Interface Controller
SS
SCK
MOSI
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
I
I
Description
Write output: This pin is the Write output signal from the external
interface. Assertion of the WR signal indicates that the ZNEO CPU
is performing a Write operation to the external memory or
peripheral.
Chip select outputs: These pins are the chip select output signals
from
programmable polarity through the external interface control
register.
Byte high enable and byte low enable indicators.
Wait input: Asserting this input signal will p ause the CPU to
provide slower external peripherals more time to complete bus
transactions through the external interface.
DMA request inputs: Each of the DMA channels have an external
request input which allows external peripherals to request access
to the address and data buses for data transfer.
DMA request outputs: Each of th e DMA ch annels have an
acknowledge indicator output to notify external peripherals that
their request for access to address and data buses has been
approved.
Serial clock: This is an input or an output clock for the I
the GPIO pin is configured for alternate function to enable the SCL
function, this pin is open-drain.
Serial data: This open-drain pin transfers data between the I
and a slave. When the GPIO pin is configured for alternate
function to enable the SDA function, this pin is open-drain.
Slave select: This signal is an output or an input. If ZNEO is th e
SPI master, this pin is co nfigured as the slave se lect output. If
ZNEO is the SPI slave, this pin is an input slave select.
SPI serial clock: The SPI master supplies this pin. If the ZNEO
Z16F Series device is the SPI master, this pin is an o utput. If the
ZNEO Z16F Series
Master-Out/Slave-In: This signal is the data output from the SPI
master device and the data input to the SPI slave device.
P R E L I M I N A R Y
the exter nal
device
interface.
is the SPI slave, this pin is an input.
The CS output
Signal and Pin Descriptions
Product Specification
ZNEO
Z16F Series
pins
2
C. When
have
2
C
13