Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 82

DEV KIT FOR Z16F ZNEO

Z16F2800100ZCOG

Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr

Specifications of Z16F2800100ZCOG

Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
Peripheral-Level Power Control
Power Control Option Bits
PS022008-0810
The ZNEO CPU is brought out of HALT mode by any of the following operations:
To minimize current in HALT mode, all GPIO pins which are configured as inputs must be
driven to one of the supply rails (V
On-chip peripherals in ZNEO Z16F Series parts automatically enter a low power mode
after Reset and whenever the peripheral is disabled. To minimize power consumption,
unused peripherals must be disabled. See the individual peripheral chapters for specific
register settings to enable or disable the peripheral.
User programmable option bits are available in some versions of the ZNEO Z16F Series
devices that enable very low power STOP mode operation. These options include disabling
the VBO protection circuits and disabling the WDT oscillator. For detailed description of
the user options that affect power management, see
WDT’s internal RC oscillator continues to operate.
If enabled, the WDT continues to operate.
All other on-chip peripherals continue to operate.
Interrupt or System Exception.
WDT time-out (System Exception or Reset).
Power-On reset.
VBO reset.
External RESET pin assertion.
Instantaneous HALT mode recovery.
P R E L I M I N A R Y
DD
or V
SS
).
Option Bits
on page 293.
Product Specification
ZNEO
Low-Power Modes
Z16F Series
67

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