Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 333

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

Table 170. Line Control Register (DBGLCR)
PS022008-0810
Table 169. Baud Rate Reload Register (DBGBR)
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Baud Rate Reload Register
Line Control Register
15
R/W
OE
The
communication stream. This register is automatically set by the Auto-Baud Detector. This
register cannot be written by the CPU when
RELOAD—This value is the baud rate reload value used to generate a bit clock. It is 
calculated as
The
cannot be written by the CPU when
OE—Output enable
This bit controls the output driver. If the UART is enabled, this bit controls the output
driver during transmission only. 
0 = Pin is open-drain during UART transmit. Pin behaves as an input if UART is disabled.
1 = Pin is driven during transmission if UART is enabled. Pin is an output if UART is 
disabled.
7
0
14
Baud Rate Reload Register (DBGBR)
Line Control Register (DBGLCR)
13
TDH
R/W
6
0
12
RELOAD = SYSTEM CLOCK
11
HDS
R/W
5
0
10
P R E L I M I N A R Y
FF_E082-FF_E083
9
BAUD RATE
TXFC
R/W
4
OCDLOCK
0
RELOAD
FF_E084
8
0000H
controls the state of the UART. This register 
R/W
is used to configure the baud rate of the serial
OCDLOCK
7
NBEN
is set.
R/W
3
0
6
x 8
is set.
5
R/W
NB
2
0
4
Product Specification
ZNEO
3
OUT
R/W
On-Chip Debugger
1
1
2
Z16F Series
1
PIN
X
R
0
0
317