Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 301

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

Table 146. DMA Control Register A (DMAxCTL)
DMA Control Registers
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
DMA Control Register
DMAxEN
IEOB
R/W
R/W
15
0
7
0
The following section describes the DMA Control registers.
The DMA Control register enables and control the DMA transfer (see
DMAxEN—DMA X enable. If this bit is written directly then normal mode is executed.
If this bit is read in from a descriptor then linked list mode is executed.
0 = DMA is disabled.
1 = DMA is enabled.
LOOP—LOOP mode
0 = Descriptor is modified when the buffer is closed.
1 = Descriptor is not modified when buffer is closed.
TXSIZE—Transfer size
00 = Byte
01 = Word
10 = Quad
11 = Reserved
DSTCTL—Destination control register
00 = Destination address does not change
01 = Destination address increments
LOOP
TXFR
R/W
R/W
14
0
6
0
FFE410H, FFE420H, FFE430H, FFE440H
FFE411H, FFE421H, FFE431H, FFE441H
R/W
EOF
R/W
13
0
5
0
TXSIZE
P R E L I M I N A R Y
HALT
R/W
R/W
12
0
4
0
R/W
R/W
11
0
3
0
DSTCTL
R/W
R/W
10
0
2
0
CMDSTAT
Product Specification
ZNEO
R/W
Table
R/W
9
0
1
0
SRCCTL
DMA Controller
Z16F Series
146).
R/W
R/W
8
0
0
0
285