Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 140

DEV KIT FOR Z16F ZNEO

Z16F2800100ZCOG

Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr

Specifications of Z16F2800100ZCOG

Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
Table 70. PWM Control 0 Register (PWMCTL0)
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
Bit Position
[7]
PWMOFF
[6]
OUTCTL
[5]
ALIGN
[4]
Reserved
[3]
ADCTRIG
[2]
Reserved
[1]
READY
PWMOFF
R/W
7
0
Value (H) Description
0
1
0
1
0
1
0
1
0
0
1
OUTCTL
R/W
6
0
Place PWM outputs in off-state
Disable modulator control of PWM pins. Outputs are in predefined off-state.
This is not dependent on the Reload event.
Re-enable modulator control of PWM pins at next PWM Reload event.
PWM output control
PWM outputs are controlled by the pulse-width modulator.
PWM outputs selectively disabled (set to off-state) according to values in the
OUTx bits of the PWMOUT register.
PWM edge alignment
PWM outputs are edge aligned.
PWM outputs are center aligned.
Reserved.
ADC trigger enable
No ADC trigger pulses.
ADC trigger enabled.
Reserved.
Values ready for next reload event
PWM values (pre-scale, period, and duty cycle) are not ready. Do not use
values in holding registers at next PWM reload event.
PWM values (pre-scale, period, and duty cycle) are ready. Transfer all
values from temporary holding registers to wor king registers at next PWM
reload event.
ALIGN
R/W
5
0
P R E L I M I N A R Y
Reserved ADCTRIG Reserved
R/W
4
0
FF_E380H
R/W
3
0
R/W
2
0
Multi-Channel PWM Timer
Product Specification
ZNEO
READY
R/W
1
0
Z16F Series
PWMEN
R/W
0
0
125

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