Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 366

DEV KIT FOR Z16F ZNEO

Z16F2800100ZCOG

Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr

Specifications of Z16F2800100ZCOG

Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
Table 192. GPIO Port Input Timing
PS022008-0810
Parameter
T
SMR
On-Chip Debugger Timing
Abbreviation
GPIO Port Pin Pulse Width to ensure Stop Mode Recovery (for GPIO
Port Pins enabled as SMR sources)
Table 193
specifications assume a 4 s maximum rise and fall time.
Table 193. On-Chip Debugger Timing
Parameter
DBG
Port Input Data
Register Latch
Input Value
Port Pin
System
provide timing information for the DBG pin. The DBG pin timing
Clock
Abbreviation
DBG frequency
Figure 75. Port Input Sample Timing
P R E L I M I N A R Y
0 Value May Be Read
TCLK
From Port Input
Data Register
Changes to 0
Port Value
Min
Delay (ns)
System Clock / 4
Max
Product Specification
Electrical Characteristics
ZNEO
1 s
Min
Delay (ns)
Z16F Series
Max
350

Related parts for Z16F2800100ZCOG