Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 266

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

Table 126. Sample Time (ADCST)
BITS
FIELD
RESET
R/W
ADDR
PS022008-0810
Bit Position
[7:5]
[4:0]
SST
Bit Position
[7:6]
[5:0]
SHT
Sample Time Register
00H - 3FH
7
Value (H) Description
00H -1FH
Value (H) Description
The sample time register is used to program the length of active time for the sample once a
conversion has begun by setting the
the PWM. The number of system clock cycles required for sample time varies from
system to system depending on the clock period used. You must program this register to
contain the number of system clocks required to meet a 1 s minimum sample time.
Reserved
0H
0H
R
0
Reserved—Must be 0.
Sample Hold Time
Sample Hold time in number of system clock periods to meet 1 s minimum.
Reserved—Must be 0.
Sample Settling Time
Sample settling time in num ber of system clock periods to meet 0.5 s
minimum.
6
5
1
P R E L I M I N A R Y
4
1
START
FF-E505H
bit in the ADC control register or initiated by
3
1
R/W
ST
2
1
Product Specification
ZNEO
1
1
Analog Functions
Z16F Series
0
1
250