Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 321
Z16F2800100ZCOG
Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr
Datasheets
1.Z16F2800100ZCOG.pdf
(2 pages)
2.Z16F2800100ZCOG.pdf
(30 pages)
3.Z16F2800100ZCOG.pdf
(388 pages)
Specifications of Z16F2800100ZCOG
Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
- Current page: 321 of 388
- Download datasheet (22Mb)
PS022008-0810
Initialization
Initialization during Reset
If the standard serial port of a PC is used, transmit flow control is enabled on the ZNEO
Z16F Series device. The PC sends the start bit when receiving data by transmitting the
character FFH. Since character FFH is also received from a non-responsive device, space
parity (parity bit always zero) must be enabled and used as an acknowledge bit.
The OCD ignores any data received until it receives the read revision command
After the read revision command is received, the remaining debug commands are issued.
The packet CRC is not sent for the first read revision command issued during
initialization.
The OCD is initialized during reset. This is done by asserting the reset pin, sending the
auto-baud character, and then issuing the read revision command. When the OCD is
initialized during reset, the
Receiving
Device
Transmitting
Device
Single Wire
Bus
ST = Start Bit
SP = Stop Bit
D0-D7 = Data Bits
Figure 67. Start Bit Flow Control
ST
ST
D0
D0
P R E L I M I N A R Y
DBGHALT
D1
D1
D2
D2
bit in the OCDCTL register is automatically set.
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
Product Specification
ZNEO
SP
SP
On-Chip Debugger
Z16F Series
00H
.
305
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