Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 268

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

Table 128. ADC0 MAX Register (ADC0MAX)
Table 129. ADC Timer0 Capture Register, high byte (ADCTCAP_H)
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS022008-0810
Bit Position
[7:4]
[3:0]
LASTCHAN0
Bit Position
[7:0]
ADC0 Max Register
ADC Timer0 Capture Register
7
7
00H–FFH
Value (H) Description
The ADC0 Max register. This register determines the highest channel that the Convert on
Read increments too.
The ADC Timer0 Capture register contains the sixteen bits of the ADC Timer0 count. The
access to the ADC Timer0 Capture register is read-only. It reads 8 bits at a time or as a 
16-bit word.
Value (H) Description
0H
0
6
6
ADC Timer0 Count High Byte
The Timer0 count is held in the data registers until the next ADC conversion is
started.
Reserved - must be 0.
LAST CHANNEL0
These bits determine the last ch annel number to increment to when the
Convert On Read is set.
Reserved
0
5
5
P R E L I M I N A R Y
4
4
ADCTCAPH
FF-E507H
FF-E512H
R/W
R
X
3
3
2
LASTCHAN0
2
Product Specification
0H
ZNEO
1
1
Analog Functions
Z16F Series
0
0
252