Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 267

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

Table 127. ADC Clock Prescale Register (ADCCP)
BITS
FIELD
RESET
R/W
ADDR
PS022008-0810
Bit Position
[7:4]
[3]
DIV16
[2]
DIV8
[1]
DIV4
[0]
DIV2
ADC Clock Prescale Register
7
The ADC Clock Prescale register is used to provide a divided system clock to the ADC.
When this register is programmed with 0H, the system clock is used for the ADC Clock.
Value (H) Description
0H
0
1
0
1
0
1
0
1
6
Reserved—must be 0.
DIV16
Clock is not divided.
System Clock is divided by 16 for ADC Clock.
DIV8
Clock is not divided.
System Clock is divided by 8 for ADC Clock.
DIV4
Clock is not divided.
System Clock is divided by 4 for ADC Clock.
DIV2
Clock is not divided.
System Clock is divided by 2 for ADC Clock.
Reserved
R
0
5
P R E L I M I N A R Y
4
FF-E506H
DIV16
3
0
DIV8
2
0
R/W
Product Specification
ZNEO
DIV4
1
0
Analog Functions
Z16F Series
DIV2
0
0
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