Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 302

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

®
ZNEO
Z16F Series
Product Specification
286
10 = Destination address decrements
11 = Reserved
SRCCTL—Source control register
00 = Source address does not change
01 = Source address increments
10 = Source address decrements
11 = Reserved
IEOB—Interrupt on end of buffer
0 = Do not generate an interrupt when the DMA completes this buffer
1 = Generate interrupt at the end of this buffer
TXFR—Transfer to new list address. This bit is used only in linked list mode. 
0 = Increment DMAxLAR by 16 at the end of this buffer.
1 = Load the DMAxLAR with the new List Address value from the descriptor.
EOF—End of frame
0 = This is not a End of Frame buffer
1 = This buffer is the end of the current frame
HALT—Halt after this buffer. This bit is used only in linked list mode.
0 = Next descriptor is loaded.
1 = The DMA will halt at the end of this buffer.
CMDSTAT—Command Status Field
On the first transfer of a buffer this field is placed on the CMDBUS and the CMDVALID
is asserted.
If the
bit is set, the DMA requests a status from the peripheral and places it in this
EOF
field. In linked list mode this field get written back to the descriptor.
The DMA does not use this field it simply passes it on. The definitions of these bits are
specified in each peripheral.
PS022008-0810
P R E L I M I N A R Y
DMA Controller