Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 368

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

Table 195. SPI Slave Mode Timing
PS022008-0810
Parameter
SPI Slave
T
T
T
T
1
2
3
4
(Output)
(Input)
(Input)
MISO
MOSI
SCK
SPI Slave Mode Timing
SS
Abbreviation
SCK (transmit edge) to MISO output Valid Delay
MOSI input to SCK (receive edge) Setup Time
MOSI input to SCK (receive edge) Hold Time
SS input assertion to SCK setup
Figure 77
is shown with SCK rising edge used to source MISO output data, SCK falling edge used to
sample MOSI input data.
T4
T1
and
Table 195
Figure 77. SPI Slave Mode Timing
provide timing information for the SPI slave mode pins. Timing
P R E L I M I N A R Y
T2
Input Data
T3
Output Data
2 * Xin period
3 * Xin period
1 * Xin period
Min
0
Delay (ns)
Product Specification
Electrical Characteristics
ZNEO
3 * Xin period +
20 ns
Max
Z16F Series
352