Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 197

• Manufacturer Part Number: Z16F2800100ZCOG
• Description: DEV KIT FOR Z16F ZNEO
• Manufacturer: Zilog
• Series: ZNEO™r
• Type: MCUr

Specifications of Z16F2800100ZCOG

• Contents: Evaluation Board, Software and Documentation
• For Use With/related Products: Z16F Series
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4537

PS022008-0810
Input Sample Time
(CLKPOL = 0)
(CLKPOL = 1)
interpreted as either a Master or Slave timing diagram as the SCK MISO and MOSI pins
are directly connected between the master and the slave.
Transfer Format with Phase Equals One
Figure 36
PHASE
waveforms are depicted for SCK, one for CLKPOL =
MOSI
MISO
SCK
SCK
SS
= 1
on page 182 displays the timing diagram for an SPI type transfer in which
. For SPI transfers the clock only toggles during the character transfer. Two
Bit7
Bit7
Figure 35. ESPI Timing When
Bit6
Bit6
P R E L I M I N A R Y
Bit5
Bit5
Bit4
Bit4
Bit3
Bit3
PHASE
Enhanced Serial Peripheral Interface
0
, and another for CLKPOL =
Bit2
Bit2
= 0
Bit1
Bit1
Product Specification
ZNEO
Bit0
Bit0
Z16F Series
1
.
181